1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device for video data.
2. Description of the Prior Art
In recent years, semiconductor memory devices are being used widely for office automation devices such as personal computers. Of these semiconductor memory devices, MOS random access memories (RAMs) can be used as video memories for displaying images on a display device of a personal computer and the like.
Namely, a construction is employed in which a memory device is installed between the CPU within the personal computer and the display device, and the image data of the picture is accessed on a random basis by the CPU. As such a semiconductor memory device for an image, there is being proposed a type which has two kinds of input/output ports. That is, it is a semiconductor memory device which has two ports; one random port for rewriting data within a memory cell array by means of an access from the CPU, and one serial port for supplying image signals to the display device without interruption. Such a semiconductor memory device is generally called a dual port memory.
The dual port memory is constructed by including a data register circuit which stores data supplied by the memory cell array, and serially reads data to the serial port. The conventional data register circuit is constructed by arranging a plurality of registers that are provided in one to one correspondence with each bit line pair of the memory cell array.
However, such a register has a circuit structure which is more complex and requires a larger number of elements than the memory cell. Moreover, because of the high speed operation that is required it is constructed by using transistors with a large driving capability, that is, transistors with a large size. As a result, the formation area for the registers becomes considerably larger than that of the memory cells. When a plurality of the registers are arranged corresponding to the bit line pairs of the memory cell array, it is not possible to array them in one line but rather they have to be arranged in two or more lines because the width of the register is larger than the spacing between the bit line pair.
Accordingly, the area for the data register circuit becomes very large, which obstructs the integration of the semiconductor memory device as a whole.